Reliability Analysis of SiC MOSFETs for Solid-State Circuit Breaker Application

This paper investigates the degradation characteristics of silicon carbide (SiC) metal-oxide-semiconductor field-effect transistors (MOSFETs) with controlled but prolonged positive gate bias stress and thermal shock cycling. A custom-built, four-channel modular aging station was developed to apply adjustable gate voltage bias and emulate combined electrical and thermal stress conditions. For solid-state circuit breaker (SSCB) targeted aging, the SiC MOSFETs experienced constant 20-V gate bias stress coupled with power cycling with a harsh temperature swing of AT = 125 degrees C. Experimental results demonstrated a significant reduction in breakdown voltage after 3,000 cycles-from 1,593 V to 676 V-while the gate-source leakage current remained within rated range. These findings indicate that the reduction in breakdown voltage under gate bias and high-temperature stress constitutes a novel failure mode, distinct from the typical aging characteristics such as increased on-state resistance, elevated thermal resistance, and eventual gate-source breakdown. These results highlight the critical need for reliability characterization under SSCB representative conditions and suggest directions for device design improvements and condition monitoring strategies.