Patterned Nanochannel Sacrificial Layer for Semiconductor Substrate Reuse

John Mangum; William McMahon; Emily Warren; San Theingi

Patterned Nanochannel Sacrificial Layer for Semiconductor Substrate Reuse

John Mangum (Inventor)
, William McMahon (Inventor)
, Emily Warren (Inventor)
, San Theingi (Inventor)

Research output: Patent

Abstract

Described herein are systems and methods of utilizing nanochannels generated in the sacrificial layer of a semiconductor substrate to increase epitaxial lift-off speeds and facilitate reusability of GaAs substrates. The provided systems and methods may utilize unique nanochannel geometries to increase the surface area exposed to the etchant and further decrease etch times.

Original language	American English
Patent number	11,830,733 B2
Filing date	28/11/23
State	Published - 2023

NLR Publication Number

NREL/PT-5K00-88191

Keywords

epitaxial lift-off speeds
reusability of GaAs substrates
sacrificial layer

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Cite this

@misc{3108edbc713d4639a72e09e999c8bc79,

title = "Patterned Nanochannel Sacrificial Layer for Semiconductor Substrate Reuse",

abstract = "Described herein are systems and methods of utilizing nanochannels generated in the sacrificial layer of a semiconductor substrate to increase epitaxial lift-off speeds and facilitate reusability of GaAs substrates. The provided systems and methods may utilize unique nanochannel geometries to increase the surface area exposed to the etchant and further decrease etch times.",

keywords = "epitaxial lift-off speeds, reusability of GaAs substrates, sacrificial layer",

author = "John Mangum and William McMahon and Emily Warren and San Theingi",

year = "2023",

language = "American English",

publisher = "National Renewable Energy Laboratory (NREL)",

address = "United States",

type = "Patent",

note = "11,830,733 B2",

}

TY - PAT

T1 - Patterned Nanochannel Sacrificial Layer for Semiconductor Substrate Reuse

AU - Mangum, John

AU - McMahon, William

AU - Warren, Emily

AU - Theingi, San

PY - 2023

Y1 - 2023

N2 - Described herein are systems and methods of utilizing nanochannels generated in the sacrificial layer of a semiconductor substrate to increase epitaxial lift-off speeds and facilitate reusability of GaAs substrates. The provided systems and methods may utilize unique nanochannel geometries to increase the surface area exposed to the etchant and further decrease etch times.

AB - Described herein are systems and methods of utilizing nanochannels generated in the sacrificial layer of a semiconductor substrate to increase epitaxial lift-off speeds and facilitate reusability of GaAs substrates. The provided systems and methods may utilize unique nanochannel geometries to increase the surface area exposed to the etchant and further decrease etch times.

KW - epitaxial lift-off speeds

KW - reusability of GaAs substrates

KW - sacrificial layer

M3 - Patent

M1 - 11,830,733 B2

Y2 - 2023/11/28

PB - National Renewable Energy Laboratory (NREL)

ER -

Patterned Nanochannel Sacrificial Layer for Semiconductor Substrate Reuse

Abstract

NLR Publication Number

Keywords

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Cite this