Controlled Dielectric Breakdown to Form Pinhole Passivated Contacts

This contribution explores a low-temperature route to forming dielectric pinholes to form poly-Si/dielectric/c-Si passivated contacts. The method utilizes controlled dielectric breakdown to form nanoscale pinholes in a thick (non-tunnelling) dielectric which, when annealed, allows dopant atoms to pass from doped poly-Si through the dielectric and into the c-Si wafer forming conductive pathways. We show that the pinholes can be repassivated with dopants and H diffusion which results in increased PL signals after processing. The method can be expanded to optimized dielectric passivation stacks (not just a single layer) and can be formed in parallel over the faces of the wafer in selected areas (only under the grid).